Dhanya Xavier
Analog Layout Engineer | AMS, IO Layout , sredes| Lower Tech Nodes
- Role
- Analog Layout at Tech Mahindra
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Dhanya Xavier
Analog Layout Engineer with 4years and 8 Months of experience and an MTech degree. Specializing in advanced CMOS technologies, proficient in Cadence Virtuoso, and experienced with TSMC nodes (2nm, 3nm,6nm) and Intel nodes (5nm, 7nm). Expertise includes floorplanning, placement, routing, DRC, LVS, layout matching, EM/IR, latch-up, and WPE.
Experience
Analog Layout
Oct 2024 — Present · Bengaluru, IN
Education
MGUniversity
Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering
Rajagiri School of Engineering & Technology
Master of Technology - MTech, VLSI and Embedded System
VLSI GURU Training institute
Analog Layout Training, VLSI
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