Dhanush V
VLSI RTL Design & Verification Trainee | Verilog | SystemVerilog | UVM |
- Role
- Trainee at Silicon Craft Vlsi
- Location
- Chennai, TN, IN
- LinkedIn followers
- 500 followers
Manufacturing & ProductionView LinkedIn profile
About Dhanush V
RTL Design & Verification Trainee with structured training in Digital design, Verilog, SystemVerilog, and UVM. Trained in RTL implementation and functional verification using assertions and coverage-driven methodology
Experience
Trainee
Oct 2025 — Present
Education
Kumaraguru College of Technology
Bachelor of Engineering - BE, Electrical and Electronics Engineering
2020
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