Dhanush M K
Sr. Silicon Design Engineer (DV) @AMD
- Role
- Senior Silicon Design Engineer at AMD
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Dhanush M K
Having 7+ years of working experience with expertise in SystemVerilog, UVM, Verilog, Digital electronics & RTL debugging- Worked on designing SystemVerilog RNM (Real Number Modelling [ Mimicking the Analog blocks behavior using SV]) Models (Digital Mixed Signal)- Good Knowledge on Bus Protocols like AMBA AHB, APB, AXI- Good Knowledge on Peripheral Protocols like SPI, I2C- PCIE Protocol- SOC Verification- Worked on Constraint Random Verification- Knowledge in developing SV, UVM based verification environment- Worked on Functional Coverage, SVA, Code Coverage Analysis & RAL Modelling- Knowledge in testcase writing & debugging- Perl, Python language knowledge for scripting- C Programming
Experience
Senior Silicon Design Engineer
Mar 2024 — Present · Bengaluru, IN
Education
ATME College of Engineering, Mysuru
Bachelor of Engineering (B.E.), Electronics
2013 — 2017
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.