Dhairya Nanda
Senior Digital Design Engineer at Qualcomm.
- Role
- Senior Engineer at 高通
- Location
- San Diego, CA, US
- LinkedIn followers
- 500 followers
About Dhairya Nanda
Computer Engineering (Electrical) Master\'s graduate with professional experience working as a Logic Design Engineer. Looking forward for an exciting and challenging role related to front-end/back-end ASIC/SOC development.TECHNICAL SKILLS:Hardware Description Languages: System Verilog, Assembly LanguageDesign Skills: RTL / ASIC / SOC Design, digital design, Synthesis, Debugging, Static Timing Analysis, Timing Violation, SDC, DFT, Physical Design, Layout Design, Post-Synthesis Simulation, LVS, DRC, Post Route Verification, low power designScripting Languages: Python, Perl, Tcl Programming Languages: C coding, Java (Object Oriented Programming)Simulation Tools: Cadence (Encounter, Virtuoso Hspice), Genesis2, MATLAB, ModelSim, Primetime, Synopsys (Design Compiler, Spyglass CDC, Spyglass DFT, Verdi), Xilinx Vivado
Experience
Senior Engineer
Jun 2022 — Present · San Diego, CA, US
Education
Arizona State University
Master's degree, Computer Engineering (Electrical)
2017 — 2019
Vellore Institute of Technology
Bachelor's degree, Electrical, Electronics and Communications Engineering
2013 — 2017
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