Devesh Chetiwal

WORK HISTORY

EDUCATION

ABOUT DEVESH CHETIWAL

Digital Design | VLSI Enthusiast | Embedded Systems Explorer I’m a final-year Electrical Engineering undergraduate at IIT Goa with a strong foundation in Digital VLSI, Analog IC Design, and Embedded Motor Control. What drives me is the intersection of silicon design and system-level integration, where logic meets reality — and ideas become hardware. Hands-on Digital Design & VLSI Implementation From crafting a fully functional UART Packetizer with FSM and FIFO integration to implementing advanced ECC schemes like LDPC and Reed-Solomon on FPGA, my academic journey has been grounded in building real, testable systems. I’ve simulated, synthesized, and deployed designs across tools like Vivado, Quartus, and Electric VLSI, and I’ve worked extensively with Verilog, VHDL, and SystemVerilog. 🧠 Analog IC Design Meets Embedded Control I’ve designed a two-stage CMOS op-amp, and simultaneously explored the embedded domain via my internship at Ecozen, where I worked on motor parameter estimation, PWM generation, and real-time control using TI microcontrollers. What Sets Me Apart Whether it’s debugging waveform mismatches in simulation or tuning injection-based estimators in embedded motor loops, I take pride in my ability to understand both the theoretical depth and hardware constraints of engineering systems. I don’t just build — I investigate, iterate, and optimize. Looking Ahead My long-term goal is to work on cutting-edge SoC and ASIC development — building high-speed, low-power digital logic with solid testability. I\'m passionate about contributing to the next generation of silicon innovation and open to opportunities in DV,RTL design, DFT and physical design verification. Let’s Connect I’m always eager to learn from peers, mentors, and professionals across the semiconductor and embedded ecosystem. Feel free to reach out if you’re looking to collaborate, discuss VLSI design, or talk about hardware dreams.