Devender

Director, Design Enablement, TD

Role
Director, Design Enablement & Design Rules, Technology Development at Micron Technology
Location
Boise, ID, US
LinkedIn followers
500 followers

About Devender

Professional: Extensive Fab experience (15+ years), IC design and Data Automation Management • At Micron I am managing Global Design Enablement and Design Rule teams across Boise, Hiroshima and Guadalajara responsible for managing design rule calculations and enabling new devices across all nodes (including in HVM) • At Intel I formed and managed Global Process Integration teams (3 teams in Ireland, Israel and Arizona); responsible for Intel\'s 3, 4, 12 and 16nm technologies- delivering on yield roadmap, fixing reliability issues and transitioning those technologies to foundry in HVM.• At Samsung I managed DFM teams under Technology Development; driving strategy & methodology for design evaluation of Foundry customers\' including DRC, PEX and ERC compatibility; Complete ownership of chip verification to Si-tapeout (including LVS, DRC/ERC, OPCbias, Mask Prep, NPI and Mass Production support) Engineering • Successfully delivered multiple technology projects, and integration changes for yield and cost improvement. • Architect design database (S3) and Machine Learning models (VAE, Random forest, k-nearest means) for inline monitoring. • Designed numerous in-house test chips for Ground Rule validation and Yield. Academic: PhD in Device Physics & Materials Engineering, 23 publications, 200+ citations, PhD, 10 disclosures (Patents & Trade Secrets), research highlighted in news outlets and peer reviewer of leading journals• Others: multiple honors at both Professional (highest company honors) and Academic levels( bachelors and graduate school), and won 15+ academic competitions

Experience

  1. Director, Design Enablement & Design Rules, Technology Development

    Micron Technology

    Apr 2025 — Present

    Leading the Design Enablement and Design Rule teams for Micron\'s cutting-edge DRAM technologies, including HBM and DDR products, in Technology Development

Education

  • Indian Institute of Technology (Banaras Hindu University), Varanasi

    B. Tech., Ceramic Engineering

    2007 — 2011

  • DAV School, Jind

    General

    1996 — 2004

  • Rensselaer Polytechnic Institute

    Doctor of Philosophy (Ph.D.), Materials Science

    2011 — 2015

  • Moti Lal Nehru School, Jind

    High School, Science

    2004 — 2006

Skills

  • Cross-Functional Team Leadership
  • Analytics
  • Scanning Electron Microscopy
  • Business Strategy
  • Product Management
  • Process Engineering
  • Materials
  • Glass
  • Competitive Analysis
  • Entrepreneurship
  • Data Analysis
  • Market Research
  • Engineering
  • Semiconductors
  • Materials Characterization
  • Thin Films
  • Product Marketing
  • R&D
  • Programming
  • Product Development
  • Materials Science

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Devender — Director, Design Enablement & Design Rules, Technology Development at Micron Technology in Boise, ID, US | Unifers