Devadathan Raghunathan

SoC DFT Engineer at Intel Corporation

Role
Soc Dft Engineer at Intel
Location
Bengaluru, KA, IN
LinkedIn followers
500 followers

About Devadathan Raghunathan

Design For Testability (DFT) Engineer who is passionate to learn new technologies.

Experience

  1. Soc Dft Engineer

    Intel

    Jan 2021 — Present · Bengaluru, IN

Education

  • Government polytechnic college, Chelakkara

    Diploma, Electronics and Communications Engineering

    2010 — 2013

  • SMT GHSS Chelakkara

    Higher Secondary Examination, Science

    2008 — 2010

  • St.Thomas HS Mayannur

    SSLC

    2008

  • NEHRU COLLEGE OF ENGINEERING AND RESEARCH CENTRE, PAMBADY

    Bachelor of Technology (B.Tech.), Electronics and Communications Engineering

    2013 — 2016

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Devadathan Raghunathan — Soc Dft Engineer at Intel in Bengaluru, KA, IN | Unifers