Dev Savaliya
VLSI & Design Verification trainee | Indeeksha Digital Pvt Ltd Gate\'25 EC qualified
- Role
- Design Verification Trainee at Indicus Technology
- Location
- Surat, GJ, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Design Verification Trainee
Jan 2025 — Present · Ahmedabad, IN
Education
Government Engineering College,Gandhinagar
Bachelor of Engineering - BE
2021 — 2025
J.B and karps vidhya sankul
SSC
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