Deon Haynes Crasta

PDK Engineer @INTEL | Pursuing ME in VLSI Design

Role
Pdk Library Validation Engineer at Intel
Location
Mangaluru, KA, IN
LinkedIn followers
500 followers

About Deon Haynes Crasta

PDK Engineer at Intel | Semiconductor and VLSI enthusiast | ME in VLSI DESIGN |…

Experience

  1. Pdk Library Validation Engineer

    Intel

    Jun 2025 — Present · Bengaluru, IN

Education

  • Pana Global School

    PUC

    2017 — 2019

  • Manipal School of Information Sciences

    Master of Engineering - MEng

    2023 — 2025

  • St Joseph Engineering College, Mangaluru

    Bachelor of Engineering - BE

    2019 — 2023

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Deon Haynes Crasta — Pdk Library Validation Engineer at Intel in Mangaluru, KA, IN | Unifers