Deepu Jose
Senior Physical Design Engineer @Allegro MicroSystems
Edinburgh, GB
EMAILS
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Feb 2022 — Present
Senior Physical Design Engineer @Allegro MicroSystems
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SKILLS
Xilinx IseReal-Time Operating Systems (Rtos)Physical DesignCreativityRtosSystem VerilogCDigital Signal ProcessingHtml5MicroelectronicsStatic Timing AnalysisJqueryField-Programmable Gate Arrays (Fpga)System on a Chip (Soc)Electronics Hardware DesignEclipseVery-Large-Scale Integration (Vlsi)Amazon Web Services (Aws)MatlabDesign Verification TestingEmbedded SystemsC++VhdlCloud ComputingJavaTortoise SvnLinuxJspRtl DesignCadence VirtuosoVerification and Validation (V&V)Software DevelopmentSystem CJavascriptVerilogSpecmanSoftware Development Life Cycle (Sdlc)Embedded C
ABOUT DEEPU JOSE
Building a Chip is like building a City\'
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