Deepthi Priyanka Pamarthi

Member of Technical Staff @Rivos Inc

CA, US

I am working on Physical Verification (PV) analysis for subsystems and full-chip SoC designs across advanced technology nodes. My role involves enabling and reviewing PV runs using Calibre, focusing on DRC, ERC, LVS, antenna, PG shorts, and density checks.Key contributions include:Hierarchical Block Verification: Enabling PV runs for multiple subsystems and providing detailed reviews to ensure sign-off readiness.Full-Chip DRC Analysis: Driving SoC-level DRC closure by filtering and categorizing errors (below/above specific layers, density, base, waived DRC, etc.) for faster debug.Methodology Development: Creating automation scripts to improve PV efficiency — including TCL utilities for Innovus/Fusion Compiler, Python scripts for parsing DRC results into Excel, and CSH utilities for PV status reporting.Debug & Integration: Solving complex integration challenges such as interface shorts, antenna violations, and systematic DRC issues by providing precise debug markers and collaborating with PD teams for closure.Innovation in PV Flows: Delivering scalable solutions to address systematic shorts, antenna, and density issues, reducing manual iterations and improving turnaround time.This role has allowed me to combine my hands-on debug expertise with a strong focus on flow automation and methodology improvements, directly contributing to faster PV closure and higher design quality.

JNTU Anantapur

Bachelor of Technology - BTech, Electronics and Communications Engineering