Deepanshu Vashishtha
Design Verification Engineer | IIT Kanpur | GATE EC AIR 269| EE
- Role
- Design Verification Engineer at AMD
- Location
- New Delhi, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Deepanshu Vashishtha
M.Tech candidate at IIT Kanpur with a CPI of 8.25. • Secured AIR 269 in GATE ECE…
Experience
Design Verification Engineer
Aug 2024 — Present · Hyderabad, IN
Education
Indian Institute of Technology, Kanpur
Master of Technology - MTech, Signal Processing Communication and Networks (SPCOM)
FEROZE GANDHI INSTITUTE OF ENGG AND TECHNOLOGY , RAEBARELI
Electronics and Communications Engineering
2015 — 2019
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