Deepak Tanna

About Deepak Tanna

My work sits at the intersection of deep architectural rigor and long-horizon systems thinking — building IP Architecture that scale across products, generations, and ecosystems.With 26+ years in the semiconductor industry, I have led IP architecture and microarchitecture for advanced compute platforms spanning server, client, and mobile segments. As an on-chip fabrics and Soft IP architect, I build IPs from the ground up — defining architectural vision, authoring detailed architecture specifications, driving performance modeling and trade-off analysis, and guiding realization through RTL, validation, and silicon bring-up.I focus on creating reusable, scalable IP frameworks that compound value across programs rather than solving point problems. My work in performance-critical SoC/Chiplet subsystems and interconnect architectures translates emerging workload shifts — particularly in AI and data-centric compute — into durable microarchitectural innovation aligned to multi-generation roadmaps.Across global engineering ecosystems, I operate as a technical integrator:• Converting ambiguous system requirements into clean architectural abstractions• Aligning microarchitecture decisions with platform strategy, cost, and schedule realities• Influencing significant technology investments through data-driven analysis• Bridging architecture, design, validation, and product teams to accelerate executionInnovation, invention, and mentorship are central to my leadership model. I have contributed patents and internal technical publications, lead Intel’s internal mentor circle for senior technologists, and mentor deep-tech startups navigating complex architectural trade-offs.In parallel, I extend my perspective into governance and responsible innovation as a Certified Independent Director, integrating technology foresight with enterprise risk, ESG considerations, and long-term value creation.I am energized by shaping platform defining semiconductor soft IPs, strengthening technical culture, and advancing silicon capability across generations — building architectures and organizations that endure.Strengths: Learner | Achiever | Discipline | Focus | Intellectual Curiosity

Experience

1. Principal Engineer

   Intel

   Apr 2021 — Present · Bangalore Urban, IN

Education

• Vishwakarma Institute of Technology (V.I.T.) Pune

  B.E., Electronics

  1993 — 1996

• Bharati Vidyapeeth

  Diploma, Industrial Electronics

  1990 — 1993

• Indian Institute of Technology, Bombay

  MTech, Microelectronics

  1998 — 2000