Deepak Kks
Physical Design Engineer | ASIC PnR & STA | SmartFFT Research
- Role
- Intern at Clupav Scientific Pvt Ltd
- Location
- Hyderabad, IN
- LinkedIn followers
- 500 followers
About Deepak Kks
Physical Design Engineer with expertise in ASIC Design, Place & Route (PnR), Static Timing Analysis (STA), and Digital VLSI. With a strong foundation in RTL to GDSII flow, Physical Verification (DRC, LVS), and Power Planning (UPF). Executed projects involving timing closure, IR drop analysis, and congestion management using Synopsys ICC & PrimeTime. Highlights- Completed Physical Design Training at Takshila VLSI Technologies, working on 32nm ASIC layout, clock - tree synthesis (CTS), and routing- Hands-on experience in ASIC PnR, timing analysis, and power-aware design, Achieved 10% IR drop reduction ensuring 100% DRC clean designs- Developed SmartFFT algorithms for 6G frequency detection and MR spectroscopy- Worked on FPGA design, Embedded Systems, and AI-based Pulmonary Disease Diagnosis models. Expertise- ASIC Physical Design: RTL to GDSII, Floorplanning, Placement, CTS, Routing - Timing Closure & Power Analysis: STA, IR Drop, MCMM analysis - Physical Verification: DRC, LVS, Design Rule Checks using industry tools - 6G & SmartFFT Research: Signal Processing, mmWave & THz Communications, Frequency Detection - EDA Tools: Synopsys ICC, PrimeTime, Cadence Innovus, Mentor Calibre Hands on experience in FPGA Design & Validation, Computer Architecture, CMOS & RF IC Designs,THz Electronics ESP 32 (all Power Modes) Passionate about VLSI, semiconductor design, and next-gen computing, I am looking for exciting opportunities to innovate in Physical Design & ASIC Verification.
Experience
Intern
May 2024 — Present · Hyderabad, IN
Developed SmartFFT-based algorithms for 6G frequency detection and signal processingResearched and optimized spectral estimation techniques for millimeter-wave (mmWave) and terahertz (THz) communicationsImplemented signal denoising & frequency extraction methods to improve real-time wireless communication efficiencyCollaborated with researchers teams from IIST to enhance modulation and beamforming techniques and for Developing USRP and Hardware
Education
Mahindra École Centrale
Bachelor of Technology - BTech
2020 — 2024
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