Dandekar Chakradhar Patil
Rtl Design Engineer @Icomm Tele Limited
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WORK HISTORY
Rtl Design Engineer @Icomm Tele Limited
Hyderabad, IN
EDUCATION
Kakatiya Institute of Technology & Science, Yerragattu Hillocks, Bheemaram, Hasanparthy, Warangal
Bachelor of Technology - BTech, Electronics and Communication Engineering
ABOUT DANDEKAR CHAKRADHAR PATIL
Experienced in developing DSP solutions for RF applications. Designed RTL for digital filters, AM, PM, FM, LSB, USB demodulation, and FFT processing with variable window sizes, overlapping windows, and averaging for spectral analysis. Implemented baseband signal downconversion from Analog Devices transceivers, upconversion, and adaptive downsampling to meet bandwidth requirements.Proficient in High-Level Synthesis (HLS) with Vitis HLS. DMAdata streaming for efficient PS-PL communication using XILINX AXI DMAHands-on experience with RF transceivers (AD9008, AD9371, AD9364) and FPGA evaluation board development, including Kintex-7 FBG484 using DX Designer. Used MATLAB Simulink for DSP validation, IQ correction, and DC offset compensation.Worked with Zynq ZC706, UltraScale+ RFSoC, and MPSoC platforms, including ZCU102.
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