David Tester Fiet
Chief Engineer @Ensilica
Cambridge, GB
EMAILS
MOBILE NUMBERS
+91 *********19
Signup · Get unlimited contacts
WORK HISTORY
Jan 2022 — Present
Chief Engineer @Ensilica
View department →
EDUCATION
1989 — 1993
University of Hull
BEng(Hons) - First Class, Electronic Engineering
SKILLS
DvdApplication-Specific Integrated Circuits (Asic)Radio Frequency (Rf)VhdlSystemverilogSocIntegrationEdaWireless TechnologiesLow Power DesignStart-UpsFull CustomPcb DesignSemiconductorsWlanSystem on a Chip (Soc)P&RIc LayoutVenture CapitalAsicIcRfField-Programmable Gate Arrays (Fpga)PmicFpgaDvbIntegrated Circuits (Ic)AnalogMixed SignalEmbedded SoftwareVerilogWirelessIntegrated Circuit DesignElectronicsGpsUpfEmbedded SystemsRfic
ABOUT DAVID TESTER FIET
David has 30 years of experience combining deep hands-on semiconductor development and…
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.