Dave Oesterreich
- Role
- Design Verification at Apple
- Location
- San Francisco, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Dave Oesterreich
30+ years industry experience; 25 years leading projects, managing and leading…
Experience
Design Verification
Mar 2019 — Present
Leading a team to verify power management IP for the world’s best mobile devices. Hiring experienced DV engineers in Cupertino and Portland!
Education
University of Illinois Urbana-Champaign
BSEE, MSEE, electrical engineering, computer engineering
1988 — 1994
Skills
- Verilog
- Vlsi
- Formal Verification
- Integrated Circuit Design
- Application-Specific Integrated Circuits (Asic)
- Usb
- Fpga
- Microprocessors
- Product Development
- Semiconductors
- Microcontrollers
- Asic
- Eda
- Engineering Management
- Ic
- Soc
- Functional Verification
- Silicon
- Rtl Design
- Electrical Engineering
- Mixed Signal
- System on a Chip (Soc)
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