Dutt Panchal
Verification Trainee @SuchiLogic | Building edatoolsdirectory.com | Ex-VLSI Intern @Scaledge | Final Year ECE @DDU | Helping 2000+ Engineers Learn VLSI via “The Silicon Diaries” 📝
- Role
- Vlsi Verification Trainee at Suchilogic
- Location
- Nadiad, GJ, IN
- LinkedIn followers
- 500 followers
About Dutt Panchal
Hi, I\'m Dutt Panchal.I\'m a final-year Electronics and Communication Engineering student at Dharamshinh Desai University in Nadiad, Gujarat. My journey started with a diploma from BBIT in Vallabh Vidhyanagar, and honestly, I couldn\'t have asked for better support from my family along the way.What gets me excited? The intersection of hardware and software – everything in VLSI and Semiconductor design.Over the past few years, I\'ve dived deep into electronics, PCB design, and programming across multiple languages (Python, C, JavaScript, HTML, PHP, VHDL, and Verilog). I\'ve also explored content creation and digital marketing, which has been a fun side adventure.This summer, I completed an internship in VLSI Design and Verification at Scaledge Technology, which really solidified my passion for the semiconductor industry. That\'s where I\'m headed next – looking for opportunities to contribute to chip design and verification.I love connecting with people who share similar interests or are working on cool projects. Whether you want to discuss the latest in semiconductor tech, collaborate on open-source projects, or chat about where the industry is headed, I\'m always game.Let\'s connect- Check out my projects and contributions on GitHub: https://github.com/DuttPanchal04- Stay updated with my insights on AI, Electronics, and VLS through LinkedIn Newsletter: Creation- EDA Tools Directory: https://edatoolsdirectory.com/- Elekiq: https://elekiq.netlify.app/Thank you for reading – I look forward to connecting with fellow tech enthusiasts!
Experience
Vlsi Verification Trainee
Dec 2025 — Present
Started a 6-month VLSI Verification Internship at SuchiLogic, a semiconductor startup by Suchi Semicon in Surat. I’ll be working hands-on with real chip verification—writing SystemVerilog/UVM testbenches, debugging RTL, and driving coverage-driven verification from day one. This role offers real ownership, startup-level responsibility, and proves meaningful semiconductor work can happen outside traditional tech hubs. The focus: building strong verification skills to catch bugs before silicon and contribute to production-level designs.
Education
Dharmsinh Desai University
Bachelor of Technology - BTech, Electronics and Communication ( EC )
Gujarat Technological University (GTU)
Diploma, Electronics and Communications Engineering
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.