Dasaradha Ramaiah
ASIC Design Verification Engineer
- Role
- Project Intern at Maven Silicon
- Location
- Hyderabad, IN
- LinkedIn followers
- 500 followers
About Dasaradha Ramaiah
Welcome to my LinkedIn profile! I\'m a driven professional with a strong focus on the fascinating realm of VLSI (Very Large Scale Integration) and a proven expertise in RTL (Register Transfer Level) design. With an eye for detail and a passion for efficiency, I\'m dedicated to crafting intricate chip designs that contribute to the ever-evolving tech landscape.My journey in the VLSI field has equipped me with a robust understanding of digital design methodologies, enabling me to transform complex ideas into tangible, high-performance solutions. My proficiency in RTL design empowers me to create designs that not only meet specifications but also optimize performance, power, and area considerations.Beyond my technical skills, I\'m a collaborative team player who thrives in dynamic environments. I\'m excited about the possibilities that arise from interdisciplinary collaboration and am always eager to explore innovative approaches to problem-solving
Experience
Project Intern
Mar 2024 — Present · Bengaluru, IN
Education
S R R ZP HIGH SCHOOL
SSC
2016 — 2017
SIR C.R.R. COLLEGE
Bachelor of technology
2019 — 2023
SRI CHAITANYA JUNIOR COLLEGE, VIJAYAWADA
Intermediate
2017 — 2019
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