Darshan N
🎯 Aspiring ASIC Verification Engineer | BTech in VLSI @ VIT Vellore | Learning SystemVerilog, UVM, AI+EDA | Open to Internships & Research
- Role
- Marketing Core Member at Saeindia
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Darshan N
I’m not just learning VLSI — I’m aiming to master it.As a 2nd-year BTech student at VIT (VLSI Design and Technology), I’m focused on becoming an ASIC Verification Engineer capable of contributing to world-class semiconductor companies. I\'m diving deep into SystemVerilog, UVM, RTL Design, and testbench development, and I regularly practice using Vivado, ModelSim, and GitHub.I’ve already completed NPTEL courses in Digital Circuits and am now pursuing industry-relevant certifications in HDL, MATLAB, and AI in EDA.My goal? To work at the intersection of automation and chip verification — and land internships that challenge and grow my skills.
Experience
Marketing Core Member
Dec 2024 — Present · Vellore, IN
Driving outreach, promotions, and engagement for technical events and initiatives
Education
Goodwill English High School
4th - 10th
Vellore Institute of Technology
Bachelor of Technology - BTech, Electronics Engineering VLSI Design and Technology
2028
BGS PU College
11th, PCMB
Shree Ram PU College
12th, PCMB
M.E.S English High School
LKG - 3rd
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