D. S. Prasad Reddy Padala

Senior Verification Leader | Expert in Low Power & Functional Safety

Role
Sr Staff Engineer Mgr at Qualcomm
Location
Bengaluru, KA, IN
LinkedIn followers
500 followers

About D. S. Prasad Reddy Padala

Passionate about delivering high-quality, bug-free designs through robust verification strategies. With 17+ years of experience in IP and SoC Design Verification, I specialize in building scalable verification methodologies and leading high-performing teams to success.Currently, I lead SoC Power and Functional Safety Design Verification for Snapdragon platform SoCs powering Modem, Mobile, XR/VR, Compute, IoT, and Automotive markets, managing a team of 25 engineers. My expertise lies in low-power design verification techniques, and I have successfully driven Power DV for numerous complex SoCs.Core Strengths• Technical Leadership: Proven ability to lead and mentor large teams, foster next-gen leadership, and ensure world-class execution.• Advanced Verification Expertise: Coverage-driven constrained random verification (SV/UVM), assertion-based verification, functional coverage closure, and formal verification basics.• Low-Power & Safety DV: Architecting and executing power-aware verification (UPF-based), implementing safety verification methodologies, and driving compliance.• Protocol Expertise: USB3.0/3.1, AHB, AXI and BLE Protocols.• Post-Silicon Knowledge: Strong understanding of validation flows and silicon correlation.I am passionate about innovation in verification methodologies, scaling teams for future challenges, and delivering reliable, safety critical, low-power SoCs that power next-gen technologies.

Experience

  1. Sr Staff Engineer Mgr

    Qualcomm

    Nov 2021 — Present · Bengaluru, IN

Education

  • National Institute of Technology, Tiruchirappalli

    M.Tech, VSLI

    2006 — 2008

  • Andhra University

    Bachelor of Engineering (B.E.), Electronic and communications engineering

    2002 — 2006

Skills

  • Static Timing Analysis
  • Amba Ahb
  • Integrated Circuit Design
  • Vlsi
  • Universal Verification Methodology (Uvm)
  • Eda
  • Systemverilog
  • Usb3.0
  • Soc
  • Cmos
  • Formal Verification
  • Rtl Design
  • Verilog
  • Functional Verification
  • Bluetooth Low Energy
  • Asic

Find verified contacts for anyone on LinkedIn

Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.

Free plan included · No credit card required

This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.

D. S. Prasad Reddy Padala — Sr Staff Engineer Mgr at Qualcomm in Bengaluru, KA, IN | Unifers