Kai Shek Qwah
Senior Epitaxial Engineer @PsiQuantum
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WORK HISTORY
Senior Epitaxial Engineer @PsiQuantum
San Jose, CA, US
Lead end-to-end MBE process development of crystalline complex oxides (e.g, BaTiO₃) on 300 mm Si in a Class-100 cleanroom, enabling single-photon photonic-quantum chips. Design, execute, and optimize epitaxial thin-film deposition recipes, delivering tight growth-rate control and wafer-level uniformity. Plan statistically rigorous DoE campaigns to improve film quality and device performance; drive root-cause analysis and close the loop with rapid iteration. Build ML-driven automation for the process flow (neural-network–based image/signal inference, real-time triggers), reducing manual intervention and stabilizing run-to-run variability. Develop Python pipelines for advanced image & signal processing (RHEED, XRD, ellipsometry): feature extraction, denoising, frequency analysis, and visualization for fast, physics-aware decisions. Engineer data workflows for MBE telemetry and metrology (ETL, QC, SPC) and deliver dashboards/alerts that surface tool health, drift, and yield risks to operations. Partner with Fab/Device/Metrology teams; author SOPs and best practices; Contribute production-grade code for automation and inline image processing.
EDUCATION
UC Santa Barbara
Doctor of Philosophy (Ph.D.), Materials Engineering
HELP University
A- Levels, A-Levels
Imperial College London
Master’s Degree, Physics with Theoretical Physics
SKILLS
ABOUT KAI SHEK QWAH
I’m a materials/semiconductor engineer at PsiQuantum, leading MBE R&D of barium titanate (BTO) on 300 mm silicon for photonic quantum computing. I own end-to-end process development and build automation (sensing, analytics, control) to make oxide-on-silicon epitaxy predictable, scalable, and fab-friendly.Since 2015 I’ve bridged computational and experimental work across devices—vertical GaN FinFETs, GaN p–n diodes, tunnel junctions, and cascaded nitride LEDs—translating theory (transport, band structure, polarization) into manufacturable structures. I code in C++/Python/Fortran, and use techniques like Kinetic Monte Carlo and graph algorithms (e.g, Dijkstra’s) to accelerate learning cycles and close the loop between growth, metrology, and device performance.I’ve published multiple peer-reviewed papers (four first-author), presented at major conferences, and thrive in fast-paced startup environments. I bring a global perspective from living and working on three continents.What I’m focused on now:• Scaling BTO-on-Si epitaxy for 300 mm platforms (uniformity, yield, cycle time)• Automation of MBE workflows: telemetry pipelines, real-time monitoring, data-driven control• Integrating growth, characterization, and device modeling to shorten iteration loops
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