Cindralla George
Emulation and Prototyping Expert at Intel Corporation
- Role
- Soc Design Engineer at Intel
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Soc Design Engineer
Aug 2023 — Present · Santa Clara, CA, US
Education
Cochin University of Science and Technology
Master of Engineering - MEng, VLSI and Embedded systems
2013 — 2015
Cochin University of Science and Technology
Bachelor's degree, Electrical, Electronics and Communications Engineering
2008 — 2012
Skills
- Proficient in Complete Physical Design Flow Involving Design Planning, Floor Planning, Power Planning, Place & Route, Clock Tree Synthesis, Ir Drop,Analysis, Timing Analysis and Closure, Physical Verification Etc.
- Digital Signal Processing
- Microblaze
- C#
- Wi-Fi
- Digital Image Processing
- Drc and Lvs
- Wireless Mesh
- Verilog
- Windows
- Field-Programmable Gate Arrays (Fpga)
- Ltspice
- Rf Design
- Cadence Spectre
- Signal Generators
- Threads
- Matlab
- Cadence Virtuoso
- Microcontrollers
- 8051 Microcontroller
- Python
- Arm Isa (Machine Language), Rtos (Machine Language)
- Simulink
- Microsoft Office
- Arm Architecture
- Fpga Prototyping
- Ieee 802.15.4
- Bluetooth
- Vhdl
- Signal Analyser
- Powerpoint
- Microsoft Excel
- Sikuli
- Applescript
- C
- Bluetooth Low Energy
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