Chirag Pandya
Staff Fpga Engineer @Palo Alto Networks
San Jose, CA, US
EMAILS
c••••••@paloaltonetworks.com
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Sep 2022 — Present
Staff Fpga Engineer @Palo Alto Networks
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EDUCATION
2008 — 2012
Gujarat Technological University (GTU)
Bachelor of Engineering - BE, Electrical, Electronics and Communications Engineering
2015 — 2017
California State University, Northridge
Master of Science (MS), Electrical Engineering
ABOUT CHIRAG PANDYA
Working as a Staff FPGA Engineer at Palo Alto Networks. Graduated from California…
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