Chintan M K
Physical Design Engineer
- Role
- Physical Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Chintan M K
Physical Design Engineer with expertise in ASIC Physical Design flow, including:• Floor Planning• Power Planning• Placement• Clock Tree Synthesis (CTS)• Routing• Static Timing Analysis (STA)Published author at the VDAT-2024 symposium.
Experience
Physical Design Engineer
Apr 2025 — Present · Bengaluru, IN
Education
PES University
Master of Technology - MTech
2023 — 2024
Visvesvaraya Technological University
Bachelor of Engineering - BE
2018 — 2022
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