Chinmaya Bhat

Senior Dsp Engineer @E-Space

Duisburg, DE

5G NR L2/L3, PHY, System Design, C/C++- Implementation of MAC procedures - PHR, SR, HARQ, Timing Advance. Optimizing RRC Reestablishment,Reconfiguration for the satellite link (pro-active grant)- Responsible for internal tool that generates KPIs; identifying bugs, optimization of the stackbased on the KPI analysis. Cross collaboration with PHY + Testing team to identify system level issues- Responsible for AT command module- Good understanding (at protocol stack level) of PUCCH, PDCCH, DCI with affinity towards physical layerproblems- Coming up with design documents, cross-collaboration with teams to implement, optimize features- Internal tools for logging, asn decoder/encoders, wireshark dissector implementation, FAPImessages, RRC/NAS timers, socket programming and log analysis- Platform: NXP Layerscape ARM DSP processor, x86 platforms

RWTH Aachen University

Masters, Communication Engineering

PES University

Bachelors, Electronics and Communication Engineering