Chilukuri Naveenkumar
M.Tech, VLSI Design and verification engineer at Juntran Technologies Pvt Ltd
- Role
- Vlsi Design and Verification Engineer at Juntran Technologies Pvt Ltd
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Chilukuri Naveenkumar
Masters degree in VLSI. B.Tech in Electronics and Communications Engineering.Worked VLSI verification in Juntran technologies pvt ltd.> Good knowledge in System Verilog and UVM methodology.> Knowledge in developing TB & TB components for block level.> Strong coding skills for Verification and on standard simulators such as Questasim, EDAPlayground used in verification and waveform-based debugging tools.Technical SkillsHDL/HVL: Verilog, System VerilogVerification Methodology: UVMOther Languages: C, C++Protocol Knowledge: AXI,APBTools: Modelsim, Mentor Questa, Eda PlaygroundEditor: GvimWorked on Projects1. Developed and verified AXI protocol in UVMDescription: AXI (Advanced extensible Interface) is a point to point interconnect. AXI is a highbandwidth, high performance and low latency. One of the components of the AMBA 3.0 busarchitecture. AXI used as a processor interface to the rest of system.2.Developed and verified APB protocol in System VerilogDescription: The Advanced Peripheral Bus (APB) is part of the Advanced Microcontroller BusArchitecture (AMBA) protocol family. It defines a low-cost interface that is optimized for minimalpower consumption and reduced interface complexity. The APB protocol is not pipelined, use it toconnect to low-bandwidth peripherals that do not require the high performance of the AXI protocol.The APB protocol relates a signal transition to the rising edge of the clock, to simplify the integrationof APB peripherals into any design flow. Every transfer takes at least two cycles.
Experience
Vlsi Design and Verification Engineer
Present
Education
Jawaharlal Nehru Technological University
Bachelor of Technology - BTech
2013 — 2017
JNTUH College of Engineering Hyderabad
Master of Technology - MTech
2018 — 2021
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