Chidambar A G
DV Engineer
- Role
- Senior Engineer at Qualcomm
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Chidambar A G
Hands-on experience in building UVM test bench from scratch using System Verilog.• Proficient in writing Test cases, Simulation and Debugging.• Experience in building test bench, creating BFMs using VHDL and Verilog. • Experience on SVA.• Experience in RTL design using VHDL & Verilog.• Experience on I2C, SPI, SGMII, Ethernet, ARINC, AXI, AHB, APB protocols.• Also have protocol knowledge on Xilinx CPRI/eCPRI platform.• Good knowledge on Python & Perl scripting.• Experience on DO-254 standards.
Experience
Senior Engineer
Jun 2022 — Present · Bengaluru, IN
Design Verification Engineer
Education
Jain (Deemed-to-be University)
Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering
2013 — 2017
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