Chetan Madiwalar
Senior Design Engineer @ACL Digital
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WORK HISTORY
Senior Design Engineer @ACL Digital
Bengaluru, IN
EDUCATION
Manipal Institute of Technology
Engineer’s Degree, Electronics and Communications Engineering
BASAVESHWAR VEERSHAIVA VIDYAVARDHAK SANGHAS BASAVESHWAR ARTS SCIENCE AND COMMERCER COLLEGE, BAGALKOT
Puc, Science
ABOUT CHETAN MADIWALAR
Accomplished Engineer who has spent 7.6 years on RTL design on SOC,ASIC and FPGA with experienced in Verilog and VHDL also knowledge on System Verilog. Offers a Btech in ECE and has desired to work in RTL and FPGA designing field. An enthusiastic and driven engineer with strong RTL coding background to improve system accuracy and reliability. And also published more than 7 International conference and Journal Papers on Biometrics,image processing and dsp application.
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