Cheng Li
- Role
- Microsoft
- Location
- San Francisco, CA, US
- LinkedIn followers
- 500 followers
Experience
Present
Education
Huazhong University of Science and Technology
Bachelor's degree, Electrical and Electronics Engineering
2005 — 2009
Zhejiang University
Master's degree, Electrical and Electronics Engineering
2009 — 2012
University of Rochester
Doctor of Philosophy (Ph.D.), Electrical and Computer Engineering
2012 — 2016
Skills
- Synopsys Tools
- Soc Design and Verification
- Tcl
- Field-Programmable Gate Arrays (Fpga)
- Cadence Encounter
- Rtos
- Verilog
- Vhdl
- C
- Signal Processing
- Embedded Systems
- Java
- Python
- Matlab
- Low-Power Design
- C/C++
- Rtl Verification
- Rtl Design
- Algorithms
- Computer Architecture
- Cadence Virtuoso
- C++
- Synopsys Vcs
- Sql
- Modelsim
- Digital Ic Design
- Upf
- Fpga
- Systemc
- Asic
- Modeling
- Pcb Design
- Systemverilog
- Synopsys Dc
- Circuit Design
- Altera Quartus
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