Charles C.
Director of YIDDMA at LTD (Yield, Integration, Device, Defect and Metrology Analytics )
- Role
- Director at Intel
- Location
- Hillsboro, OR, US
- LinkedIn followers
- 500 followers
About Charles C.
Experienced Executive / Senior Manager & Technical Leader who has led all phases of the Silicon Integrated Circuit manufacturing life cycle ( 0.8um - 1nm): technology feature definition, DR and PDK development, DTCO / DFM optimization, process-device development, product-process development, reliability improvement, yield-performance co-optimization, process-product-certification, volume yield ramp, fab process transfer and matching, Greenfield factory hiring, startup, high volume manufacturing ramp, and cost reduction, for 10+ generations of CPUs, SoCs integrated circuits and memory ( DRAM / NOR Flash ) products at best in class metrics.
Experience
Director
Aug 2024 — Present · Hillsboro, OR, US
General Manager of YIDDMA responsible for Intel Logic Technology Development Yield, Sort/Test, MIE, Device, Defect, Metrology-FA/FI, External Engagements Analytics
Education
Stanford University
PhD, Electrical Engineering
University of California, Berkeley
BS, Electrical and Electronics Engineering
Skills
- Cmos
- Integrated Circuits (Ic)
- Silicon Validation
- Debugging
- Silicon
- Device Characterization
- Characterization
- Process Integration
- Process Engineering
- Jmp
- Product Development
- Process Control
- Design for Manufacturing
- Quality System
- Spc
- Semiconductors
- Semiconductor Process
- Quality Improvement
- Dram
- Yield Management
- Reliability Engineering
- Project Management
- Cross-Functional Team Leadership
- Semiconductor Fabrication
- System on a Chip (Soc)
- Failure Analysis
- Semiconductor Industry
- Ic
- Design of Experiments
- Manufacturing
- Process Improvement
- Electronics Manufacturing
- Flash Memory
- Statistical Process Control (Spc)
- Soc
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