Charles V.
Hardware
- Role
- Sr Staff Design Engineer at Xilinx
- Location
- Union City, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Charles V.
ASIC/VLSI integration and physical design. Experienced in the complete RTL 2 GDSII flow including synthesis, DFT, place and route, timing signoff and chip finishing.Specialties: Chip integration,STA,synthesis,timing closure,floor planning, place and route.
Experience
Sr Staff Design Engineer
Mar 2018 — Present
Education
Texas A&M University
MS, Electrical Engineering
1996 — 1998
University of Madras
BS, Electrical Engineering
1992 — 1996
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