Changhyun Cho
Wafer bonding. VCT. 3D DRAM
- Role
- Research Fellow at Micron Technology
- Location
- Boise, ID, US
- LinkedIn followers
- 500 followers
Research & DevelopmentView LinkedIn profile
About Changhyun Cho
Micron Technology New Architecture for DRAM. 3D STRUCTURE, Wafer BONDING, HBM TSV
Experience
Research Fellow
Dec 2024 — Present
Education
KAIST
Ph.D
1991 — 1994
Seoul National University
Bachelor of Science (BS)
1984 — 1998
Skills
- Physics
- Semiconductor Manufacturing
- Semiconductors
- Silicon
- Process Integration
- Cmos
- Design of Experiments
- Nanotechnology
- Characterization
- Ic
- Materials Science
- Failure Analysis
- Semiconductor Industry
- Device Physics
- R&D
- Photolithography
- Device Characterization
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