Chandu Vaghasia
- Role
- Microsoft
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
About Chandu Vaghasia
SUMMARY Principal Design Verification Lead/Architect with over 20+ years of experience…
Experience
Present
Skills
- Modelsim
- I2c
- Open Verification Methodology
- Amba Ahb
- - Scripting Languages :: Perl, Shell
- Axi
- Perl
- Eda
- Usb
- Debugging
- Functional Verification
- Wireless
- Cadence
- Ic
- Rvm
- Vmm
- Synopsys Tools
- Systemverilog
- Sata
- - Methodologies: Ovm,Vmm,Rvm
- Usb3.0
- Verilog
- Soc
- - Languages: Verilog, System Verilog, Vera, C/C++
- -Usb, Xhci, Pcie, Sas, Sata, Axi, Ahb, Apb, Networking, Multimedia
- - Repository Tools :: Cvs, Perforce, Svn
- Vlsi
- Fpga
- - Bug Tracking :: Mantis, Crm
- Asic
- Application-Specific Integrated Circuits (Asic)
- Pcie
- Rtl Design
- Rtl Coding
- Rtl Verification
- Vera
- Uvm
- Semiconductors
- - Waveformviewer::Dve,Nwave,Simvision
- System on a Chip (Soc)
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.