Chandrashekar Anand
Design Verification Engineer @Apple
San Francisco, CA, US
EMAILS
c•••••@apple.com
MOBILE NUMBERS
+17•••••••23
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WORK HISTORY
Aug 2020 — Present
Design Verification Engineer @Apple
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SKILLS
VerilogFunctional VerificationTestingTest PlanningPerlIntegrated Circuit DesignC++Rtl VerificationMatlabCDebuggingMicroarchitectureProcessors
ABOUT CHANDRASHEKAR ANAND
Hardware Design Verification Engineer experienced in multiple aspects of Functional…
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