Chandan T J

About Chandan T J

Career Objective : To pursue challenging career in Semiconductor industry, ambition to contribute for business needs with cutting edge technology designs in Global environment.Experience in1. RTL Verification using HVL.2. Simulation and Regression with different EDA Tools.3. Different Scripting languages, like Shell Scripting and TCL.Specialties : Verification using System Verilog with UVM1.1d methodologyProjects Done : 1. Development of layered architecture for USB3.0 VIP.2. Functional Verification of USB3.0 Controller IP using UVM Methodology.3. Functional Verification of USB2.0 Controller IP using System Verilog.4. Logic Synthesis of DRAM Memory Controller and Low Power Optimization.5. A PLL Design in a 180nm CMOS technology for RF applications.

Experience

1. Sr Design Verification Engineer

   AMD

   Sep 2017 — Present · Bangalore, IN

Education

• BMS Institute of Technology

  Bachelor of Engineering (BE)

  2006 — 2010

• Bangalore Institute of Technology

  Master of Technology (M.Tech.)

  2011 — 2013

Skills

• Computer Architecture
• Cache Coherency
• Uvm
• Flash Memory
• Ssd
• Modelsim
• Verification Ip
• Field-Programmable Gate Arrays (Fpga)
• Rtl Design
• Vhdl
• Code Coverage
• Vlsi
• Application-Specific Integrated Circuits (Asic)
• Universal Verification Methodology (Uvm)
• Physical Design
• Integrated Circuit Design
• Systemverilog
• Tcl
• Axi
• Eda
• Usb
• Verilog
• Cadence Virtuoso
• Cmos
• Fpga
• Asic
• Functional Verification
• Functional Coverage
• Logic Design
• Shell Scripting