Chakravarthy Surapaneni

About Chakravarthy Surapaneni

Results-driven Pre & Post-Silicon Validation Engineer with 7 years of experience in…

Experience

1. Associate Research Manager

   Cognizant

   Apr 2022 — Present · Hyderabad, IN

   Developed and executed pre & post-silicon validation test plans for DDR4/DDR5 memory controllers and PCIe Gen3/Gen4/Gen5 interfaces, ensuring compliance with JEDEC and PCIe standards. • Managed an 8-member validation team, tracking project milestones, test execution, and issue resolution for DDR & PCIe validation. • Conducted client-facing presentations, summarizing validation progress, debug reports, and technical findings. • Led PCIe validation for discrete GPU contexts, utilizing protocol analyzers and exercisers for compliance testing. • Conducted high-speed signal integrity analysis for DDR and PCIe using DSOs, logic analyzers, and advanced debug tools• Developed automation scripts using C, Python and TCL, reducing validation cycle time by 25%. • Optimized DDR PHY tuning and calibration for stable memory performance across PVT variations. • •Led DDR power management validation, focusing on deep power-down (DPD) and self-refresh (SR) modes. • Assisted in LPDDR4/LPDDR5 validation for mobile SoCs, optimizing power consumption and performance. • Handled monthly invoice generation and submission, managing both SLA and non-SLA deliverables for client billing.

Education

• Maturi Venkata Subba Rao Engineering College

  Bachelor of Engineering (BE), Electronics and communication

  2011 — 2015

• Woxsen University

  Master of Business Administration - MBA

  2017 — 2019

• DRDO

  Intern

Skills

• Html
• Networking
• Microsoft Office
• Sql
• Brand Development
• Strategy
• Management
• C
• Leadership
• Informatica
• Digital Marketing