Chaitanya Reddy
Design Verification Engineer at Qualcomm
- Role
- Design Verification Engineer at Qualcomm
- Location
- Vijayawada, AP, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Chaitanya Reddy
Presently learning about CMOS technology to become expert in Microprocessor and chipmaking from one of the prestigious Institute In india.
Experience
Design Verification Engineer
Jul 2021 — Present · Bengaluru, IN
Education
Indian Institute of Technology, Mandi
Master of Technology - MTech
2019 — 2021
Vellore Institute of Technology
Bachelor of Engineering - BE
2014 — 2018
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