Cecil Symes
Senior Design Verification Engineer @Astera Labs
Mountain View, CA, US
EMAILS
c••••••••@asteralabs.com
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Feb 2025 — Present
Senior Design Verification Engineer @Astera Labs
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Santa Clara, CA, US
EDUCATION
2018 — 2021
The University of Auckland
Bachelor of Engineering - BE (Hons)
2022 — 2023
University of California, Berkeley
Master of Engineering - MEng
ABOUT CECIL SYMES
Senior Design Verification Engineer at Astera Labs, Inc. located in Santa Clara…
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