Brijesh Patel

Sr. Test Engineer at Qorvo

Role
Senior Test Engineer at Qorvo, Inc.
Location
Hillsboro, OR, US
LinkedIn followers
500 followers
Information TechnologyView LinkedIn profile

About Brijesh Patel

A Master\'s graduate with RF and Microwave as specialization. In depth knowledge of RF Fundamentals. My work experience with previous companies gave me hands-on experience in RF planning and designing of network for 4*4 MIMO, small cells, Macro, micro cells, VoLTE and Carrier Aggregation using software like Atoll and Alteryx.My experience at Qualcomm gave me in-depth knowledge of semiconductor manufacturing process and exposure to RFIC Package technologies and RF Test methodologies. I have provided test solution for high volume manufacturing on Verigy 93k tester for 5G sub-6GHz products such as PA, LPAMID, MMPA, FEM, etc. Conducted ATE hardware, test solution bring-up and ATE characterization. This gave me a solid understanding of GR & R analysis, ATE-Bench correlation, Guard band methodologies and test limit statistics. Brought up test solution for initial qual processes such as HTOL, BHAST, ESD and final production test coverage. Debug the root cause of failure by failure analysis.My work at Advantest gave me perspective from other side of testing. Work as an AE has opened up whole new set of opportunities to work with RFIM6, RFIM8, WSMX, WSMM, RMM44, RMM53, RMM72, etc. It also gives me opportunities to work for product line other than FEMs.I continue now at Qorvo on RF FEM products at Hillsboro location. Here I get to learn Test Engineering for RF products using CoHU\'s PAX testers with CoHU handlers. For the number of tests performed on it, the test time achieved by Qorvo is truly impressive using their solutions. Proud and excited to be part of it. Thanks.

Experience

  1. Senior Test Engineer

    Qorvo, Inc.

    May 2024 — Present · Hillsboro, OR, US

    Test code development for sample and high-volume production support of RF components, such as power amplifiers• Setup debugging and troubleshooting of both hardware and software, mainly on ATE• Setup and automation optimization. Evaluate test time and cost reduction.• Read and interpret technical documents including schematics, datasheets, and test procedures.• Investigate new and innovative test solutions

Education

  • California State University, Northridge

    Master of Science (M.S.), Electrical Engineering

    2015 — 2017

  • University of Pune

    Bachelor of Engineering (B.E.), Electronics and Telecommunication Engineering

    2010 — 2014

Skills

  • Cadence Virtuoso
  • Cadence
  • Matlab
  • C
  • Microsoft Office
  • C++
  • Microsoft Excel
  • Microcontrollers
  • Microsoft Word
  • Powerpoint
  • Electronics
  • Embedded C
  • Vhdl
  • Programming
  • Pspice
  • Verilog
  • Power Electronics
  • Analog Circuit Design
  • Arm
  • Digital Electronics
  • Keil
  • Labview
  • Electrical Engineering
  • Pcb Design
  • Simulink
  • Digital Signal Processors
  • Xilinx
  • Ni Multisim
  • Signal Processing
  • Circuit Design
  • Vlsi
  • Embedded Software
  • Simulations
  • Microprocessors
  • Assembly Language
  • Sensors
  • Digital Signal Processing
  • Visual C
  • Xilinx Ise
  • Soldering

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Brijesh Patel — Senior Test Engineer at Qorvo, Inc. in Hillsboro, OR, US | Unifers