Brian Standley
- Role
- Maxim Integrated
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
Experience
Present
Education
San José State University
BS, Electrical Engineering
2007 — 2010
Skills
- Verilog
- Pspice
- Fpga
- Esd
- Asic
- Reliability Engineering
- Mixed Signal
- Circuit Design
- Testing
- Electrical Engineering
- Semiconductors
- Debugging
- Analog Circuit Design
- Latch-Up
- Reliability
- Spice
- Jmp
- Oscilloscope
- Pcb Design
- Integrated Circuit Design
- Analog
- Test Equipment
- Esd Control
- Physics
- Cmos
- Integrated Circuits (Ic)
- Cadence Virtuoso
- Failure Analysis
- Cadence
- Semiconductor Industry
- Ic
- Electronics
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