Bob Blais
Soc Design Engineer @Intel
Vancouver, BC, CA
EMAILS
MOBILE NUMBERS
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WORK HISTORY
Dec 2023 — Present
Soc Design Engineer @Intel
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CA
EDUCATION
N/A
University of Victoria
Bachelor’s Degree
SKILLS
VlsiIntegrated Circuit DesignApplication-Specific Integrated Circuits (Asic)Functional VerificationSocDebuggingAsicTiming ClosureStatic Timing AnalysisEdaVerilogSystem on a Chip (Soc)SemiconductorsIcTcl
ABOUT BOB BLAIS
I am a Senior EDA Design Methodology Manager with 20+ years of experience in the…
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