Bismita Borah

About Bismita Borah

I have completed my Masters in VLSI Design at VIT University, India.I did my internship at Broadcom Ltd, Bangalore. My work was related to RTL designing and performing functional verification of the Physical layer blocks. I did gate level simulation and power calculation using PTPX Tool for the same. As an RTL designer I implemented clock gating techniques and resource sharing as some of the low power techniques in the design to make design low power specific. I have done coding of debug tables to check the functioning between the Physical layer and Media access control layer, given a set of specifications and IHRP protocol timing diagram. I have also coded the time domain part of a filter that is used when the Signal to Noise ratio is less than a specific value and have done functional verification for the same. The functional verification used here is Bit matching. The technique uses comparison between C ( the reference ) and RTL to check the functionality of the design. Currently looking for full time job in semiconductor industries that will give an immense learning experience as well as an opportunity to explore the industry better.

Experience

1. Senior Lead Engineer

   Qualcomm

   Dec 2022 — Present · Bengaluru, IN

Education

• VIT University

  Master of Technology (MTech), VLSI Design

  2014 — 2016

Skills

• Vhdl
• Cadence Virtuoso
• Quartus
• Verdi
• Uvm
• Verilog