Binoy Babu K
Aspiring VLSI Design/Verification Engineer | Skilled in Verilog, STA, Cadence Virtuoso | Passionate about Digital IC Design
- Role
- Program Analyst Trainee at Cognizant
- Location
- Belagavi, KA, IN
- LinkedIn followers
- 500 followers
About Binoy Babu K
Final-year Electronics and Communication Engineering student passionate about VLSI Design, Digital IC Design, and Static Timing Analysis.Skilled in Verilog HDL, Python, and experienced with tools like Cadence Virtuoso and Xilinx Vivado for Verilog-based design and simulation.Designed a 5-stage pipelined MIPS-32 processor and completed multiple Verilog projects, showcased on GitHub.Strong hands-on project experience in circuit design and embedded systems.Actively seeking entry-level opportunities in VLSI Design, Verification, or Physical Design domains to contribute and grow in the semiconductor industry.
Experience
Program Analyst Trainee
Jul 2025 — Present · Coimbatore, IN
Education
Gogte Institute of Technology, Belgaum
Bachelor of Engineering - BE, Electrical, Electronics and Communications Engineering
2021 — 2025
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