Binoy Ck
Sr. Design Engineering Manager ( Analog layout ) at Cadence Design Systems
- Role
- Senior Design Engineering Manager at Cadence
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Binoy Ck
13+ Years of full time experience in Analog Custom Mixed Signal Layout Design in Highspeed, SERDES, GDDR6 projects with different process technologies ranging 3nm to 28nm.Expertise in handling & leading high speed Blocks / analog IPs and Full Chip Layouts. Good understanding in CMOS devices, fabrication processes and impact of layout on processGood understanding of PVS and SVRF languages
Experience
Senior Design Engineering Manager
Jul 2025 — Present
Education
BITS Pilani Work Integrated Learning Programmes
Bachelor of Technology - BTech, Engineering Technology, General
2017 — 2021
BITS Pilani Work Integrated Learning Programmes
Master of Engineering - MEng, Microelectronics
Model Polytechnic College, Vadakara
Engineer’s Degree, Biomedical/Medical Engineering
2009 — 2012
Skills
- Linux
- Unix
- Perl
- Drc
- Svrf and Pvs Rulefile Language
- Lvs
- Analog
- Physical Design
- Cadence Virtuoso
- Cmos
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