Bijith Balakrishnan

About Bijith Balakrishnan

With a VLSI career spanning 19 years, I have touched upon custom layout, memory design, analog design and now physical verification, sign-off and tape-out.From 130 nm to 3 nm. From individual contributor to nurture & manage a team. Currently engaged in sign off and physical verification along with taping out to various foundries.

Experience

1. Solution Architect Nextgen Semicon

   Tata Consultancy Services

   Nov 2025 — Present

Education

• St. Mary's High School, Irinjalakuda

  Class X

  1990 — 1995

• University College of Engineering, Thodupuzha, Kerala

  B.Tech

  1998 — 2002

• VEDANT, SCL, Mohali

  Advanced Post-Graduate Diploma

  2005 — 2005

• Christ College, Irinjalakuda

  PDC

  1998 — 2000

Skills

• Very-Large-Scale Integration (Vlsi)
• Layout Versus Schematic (Lvs)
• Physical Design
• Drc
• Soc
• Semiconductors
• Asic
• Pll
• Vlsi
• Static Timing Analysis
• Lvs
• Ic
• Verilog
• Design Rule Checking (Drc)
• Application-Specific Integrated Circuits (Asic)
• Physical Verification
• Mixed Signal
• Eda
• Cadence Virtuoso
• Floorplanning
• Integrated Circuit Design
• System on a Chip (Soc)
• Cmos