Bhushan Vaidya
ASIC Low Power Engineer @Google
- Role
- Asic Low Power Engineer at Google
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Bhushan Vaidya
Experienced Engineer with a demonstrated history of working in the wireless industry. Skilled in PrimeTime-Px,clock tree power analysis, power optimization and leakage power estimation-optimization. Strong engineering professional with a Master of Technology (M.Tech.) focused in Electronic System Design from Bangalore.
Experience
Asic Low Power Engineer
May 2022 — Present · Bengaluru, IN
CPU Power estimation and reduction
Education
Jai Hind College , Dhule
12th, Science
2005 — 2007
IIIT Bangalore
Master of Technology (M.Tech.), Electronic System Design
2014 — 2016
Sinhgad Institute Of Technology
Bachelor of Engineering (B.E.), Electronics & Telecommunication Engineering
2007 — 2011
Skills
- Static Timing Analysis
- C
- Ltspice
- Cadence Virtuoso
- Multisim
- R Statistical Programming
- Synopsys Primetime
- Microsoft Excel
- Conformal Low Power
- Labview
- Linux
- Cadence Encounter
- Digital Ic Design
- Matlab
- Low-Power Design
- Tcl-Tk
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