Bhumika P
Aspiring RTL Design & Verification Engineer | Ex-Design Engineer Intern at SSIR Blr | VLSI | Verilog | SystemVerilog | Open to Roles in Semiconductors
- Role
- Samsung Semiconductor
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Bhumika P
I am an aspiring RTL Design and Verification Engineer with a strong foundation in digital…
Experience
Present
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