Bhavanish P
Postgraduate Diploma @IIITB | VLSI Design Trainee (RTL and Design Verification) | B.E Graduate @AJIET
- Role
- Vlsi Design Trainee at Futurewiz
- Location
- Mangaluru, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Vlsi Design Trainee
Feb 2025 — Present · Bangalore Urban, IN
RTL Design And Design Verification
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.