Bhasker Yeruva

About Bhasker Yeruva

I’m Bhasker Yeruva, Senior Director at Synopsys, where I lead global Product Engineering teams focused on High-Performance Computing (HPC) solutions for PCIe, CXL, USB and Ethernet for pre-silicon validation. With over 20+ years of experience in ASIC design, SoC verification, emulation, and post-silicon validation, I’ve built and deployed scalable hardware-assisted verification (HAV) platforms for billion-gate designs across Storage, Networking, and HPC domains.My protocol expertise spans PCIe (Gen1–Gen7), CXL, NVMe, USB (2.0–4.0), Ethernet (up to 1.6T), SAS/SATA, DDR, AMBA AXI/CHI/APB, JTAG, SPI, I2C, and NAND/NOR.As a strategic leader, I’ve built high-performing global teams, defined product roadmaps, and driven cross-functional collaboration across engineering, R&D, and customer organizations. My contributions have earned multiple industry awards and played a key role in expanding market share, improving operational efficiency, and delivering measurable business impact.

Experience

1. Senior Director

   Synopsys Inc

   Feb 2024 — Present

Education

• Osmania University

  M.Sc, Electronics, Physics

  2002 — 2004

• Birla Institute of Technology and Science, Pilani

  Master of Science (MS), Microelectronics

  2010 — 2012

Skills

• Vlsi
• Systemverilog
• Functional Verification
• Asic
• Soc
• Presilicon Validation , Emulation
• Debugging
• Spi
• Firmware
• Atpg
• Verilog
• Usb
• Modelsim
• Static Timing Analysis
• Emulation
• Amba Ahb
• Fpga
• Uvm
• Logic Synthesis
• Sata
• I2c
• Ncsim
• Vhdl
• Rtl Coding